Interconnect hardware and topology minimal requirements for high-end supercomputing systems

Abstract

Distributed shared memory systems with nonuniform memory access are considered. Some aggregate network bandwidth estimates are proposed with consideration of topological characteristics and data access patterns. Minimum hardware requirement estimates is given for torus and Clos networks. The paper was prepared on the basis of the authors’ report at the International Conference on Parallel Computing Technologies (PaVT-2008; http://agora.guru.ru/pavt2008).